Various integrated circuits utilize structures formed by a thin layer of silicon dioxide (SiO.sub.2) for various purposes. For example, a thin layer of SiO.sub.2 is used as a protection structure for on-chip resistors. As integrated circuit technologies become smaller, it is advantageous for all structures to become smaller, including thin SiO.sub.2 layers.
Suitably thin SiO.sub.2 layers can be formed using a conventional method of thermal oxide deposition. However, the high thermal budget associated with thermal oxide consumes silicon and drives source/drain (S/D) implantation further so that the S/D implant is not easily controlled.
An advantageous alternative to thermal oxide deposition of a thin SiO.sub.2 layer is deposition using plasma-enhanced chemical vapor deposition (PECVD) technique. However, conventional PECVD methods do not allow deposition of layers less than about 1000 angstroms.
What is needed is a fabrication method that repeatably produces a high quality, uniform and very thin PECVD SiO.sub.2 layer.